About VESD 2016


VLSI and Embedded Systems Design Techniques are the main pillar of most of the present research, industrial and commercial activities in Electronics Engineering. This training program focuses on specific design techniques using Xilinx Vivado Design Suite and Zybo Board. It also focuses on embedded system techniques such as RTOS, ARM processors and MIcurium.

The Training program would cover 3 major modules:

  1. Introduction to Digital Circuits and VHDL.
    This would include all combinational and sequential design learning along with VHDL implementation of these systems.

  2. Digital System Design Using FPGAs In this module, Introduction to FPGAs, CPLD, Programmable Logic to ASICs and application design using Zynq FPGA Architecture would be covered.

  3. Embedded Systems This module would cover Introduction to Microtroller and Microprocessor, Embedded System interfacing and programingm ARM architectures, Microblaze and Picoblaze design and development, RTOS and Application development using Inteligi , QT and Qemu

The training program is aimed to become a major outlet and networking opportunity for students, researchers, practitioners and educators interested in VLSI and Embedded System Designs using Xilinx Vivado Design suits and FPGAs.

The training program would use following tools and techniques.


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About the Institute


The LNM Institute of Information Technology ( The LNMIIT ) was founded in 2002 as a joint effort between Rajasthan State and Lakshmi and Usha Mittal Foundation's philanthropic initiative. With the emphasis on quality and rigor in education, the Institute was granted Deemed University status by UGC in 2006 under the De-Novo categor y.
The Institute offers four-year UG (B.Tech.), two-year M.Tech. and Ph.D. programs in the field of Communication and Computer Engineering (CCE), Computer Science and Engineering (CSE), Electronics and Communication Engineering (ECE), Mechanical-Mechatronics Engineering (MME) and Mechanical Engineering (ME). Facilities for PG research leading to Ph.D. are also available in the field of Physics, Mathematics and Humanities and Social Sciences (HSS).

Meet the Team

Advisor

Prof. S.S. Gokhale

Director, The LNMIIT, Jaipur

Advisor

Prof. Raghuvir Tomar

Dean, Research and Development, The LNMIIT, Jaipur

Advisor

Dr. Soumitra Debnath

HoD, ECE, The LNMIIT, Jaipur

Faculty Instrutor

Dr. Kusum Lata

Assistant Professor, The LNMIIT, Jaipur

Areas of Expertise: VLSI Design, Formal Verification of Hardware Designs, Digital System designs using FPGAs

Faculty Instrutor

Dr. Abhishek Sharma

Assistant Professor, The LNMIIT, Jaipur

Areas of Expertise: Embedded Systems, High Performance Computing and Organic Semiconductors.

Faculty Instrutor

Mr. Sandeep Saini

Assistant Professor, The LNMIIT, Jaipur

Areas of Expertise: Digital VLSI circuits, VHDL, Embedded Systems.

Technical Instrutor

Mr. Vinod Kumar

Technical Superintendent, The LNMIIT, Jaipur

Areas of Expertise: VHDL, Embedded Systems.

Technical Instrutor

Mr. Phoolchand Kumawat

Junior Technical Superintendent, The LNMIIT, Jaipur

Areas of Expertise: VHDL, Embedded Systems.

Teaching Assitant

Miss Surbhi Chhabra

PG student, The LNMIIT, Jaipur

Areas of Expertise: VHDL ,FPGAs(ZYNQ SoC),Vivado Design Suite

Teaching Assitant

Mr. Sandeep Sogani

UG student, The LNMIIT, Jaipur

Areas of Expertise: VHDL ,FPGAs(ZYNQ SoC),Vivado Design Suite, Arm cortex M4 based TIVA launchpad

Teaching Assitant

Mr. Sudhanshu Gupta

UG student, The LNMIIT, Jaipur

Areas of Expertise: VHDL,Digital Circuits and System,Arm cortex M4 based TIVA launchpad

Program

VESD 2016 program was as follows.

DateMorning SessionEvening Session
13-06-2016Inauguration and Registration, Introduction to Number System and Boolean AlgebraIntroduction to Vivado Design Suit, First program with VHDL
14-06-2016Combinational Circuits (Adder, Subtractor, MUX, Encoder and Decoder)VHDL codes for Adder, Subtractor, MUX, Encoder and Decoder along with test bench
15-06-2016Sequential Circuits ( Flip flop and latches)VHDL coding for ( Flip flop and latches)
16-06-2016FSM, Moore's and Mealey machineVHDL programs for FMS, traffic light controller
17-06-2016Introduction to CMOS circuit design, NAND, NOR and other basic gatesIntroduction to Microwind and simulation of NAND and NOT gates using Microwind
18-06-2016 Free Weekend. There won't be any official lectures. But doubt clearing session would be organized once in two days.
19-06-2016
20-06-2016Transmission gate based CMOS circuit designMicrowind based simulations of TG circuits. Using circuits as components
21-06-2016Complex Static CMOS design techniquesImplementing functions using CMOS design.
22-06-2016Introduction to FPGAsIntroduction to writing Testbenches in VHDL
23-06-2016Complex Programmable Logic Devices (CPLDs)Hands on session using testbenches
24-06-2016Field Programmable Gate Arrays (FPGAs)Hands on with Zynq SoC
25-06-2016Free Weekend. There won't be any official lectures. But doubt clearing session would be organized once in two days.
26-06-2016
27-06-2016Alternative FPGA ArchitecturesHands on with Zynq SoC
28-06-2016Basics of Xilinx Seven SeriesHands on with Zynq SoC
29-06-2016Zynq FPGA Architecture.Hands on with Zynq SoC
30-06-2016Embedded System interfacing and programingHands on session using Embedded Artist QSB and Experimental board, using Mded compiler and Lionaro compiler.
1/7/2016ARM architectures: Introduction and programmingHands on with ARM DS-5 and ARM MDK tools
2/7/2016 Free Weekend.
Students can start their project and work parallelly.
3/7/2016
4/7/2016Softcore processor and controllersMicroblaze and Picoblaze design and development
5/7/2016Real Time Operating Systems and Linux kernelFree RTOS, MIcurium, linux kernel, Uboot and Device driver programming
6/7/2016Application developmentInteligi, QT and Qemu
7/7/2016Matlab for Embedded SystemsIntel for IoT
8/7/2016Hands on session on application development using Intel Galileo, Centrino and multiple sensorsClosing Ceremony, Certificates distribution.
9/7/2016Free Weekend.
Students can can complete the project work parallelly.
10/7/2016
11-07-2016 Onwards For those who want to extend the internship period for next 15 days (Without extra fee and optional)

Important Dates

Registration Deadline : On-spot registration are open for the Program.
Participation Confirmation : Displayed for already registered Participants
VESD starts on: 13-06-2016
VESD Concludes on: 10-07-206

Registration Details

There are limited seats for 30 participants in the workshop which would be filled on first come first serve basis. Registration Fee is as follows:

External Faculty Members : Rs 15,000
External Students : Rs 10,000
LNMIIT Students and Faculty: Rs 6,000

Payment for Registration amount can be made through NEFT/DD/Local Cheque. DD/Cheque should be in favor LNMIIT Gymkhana Fund and it should be payable at Jaipur. DD/Local cheque should se sent to Mr. Sandeep Saini (scanned copy/original) on sandeep.saini@lnmiit.ac.in before the registration deadline.

Bank details for NEFT

Account Name: LNMIIT Gymkhana Fund
Bank Name: STATE BANK OF BIKANER & JAIPUR
Branch of Bank: SECRETARIAT Branch, JAIPUR
Account No: 61086329622
Account type: SAVING


After the payments Register online at http://bit.ly/VESD_2016

Accommodation details for External students

Accommodation would be provided in institute hostels on payment of Rs 4500 for whole program and mess facility can be availed on payment basis. Refreshments would be provided during the training program by the organizers. Accommodation payment can only be done through DD made in favor The LNM Institute of Information Technology and it should be payable at Jaipur . Thus you'll require a separate DD for hostel Accommodation.


Accommodation details for LNMIIT students

If you are staying in summer term because of summer courses/other LUSIP, then you don't need to pay any extra amount. If you plan to stay only for VESD 2016, then you need to deposit a DD of Rs 6000 made in favor of The LNM Institute of Information Technology and it should be payable at Jaipur, before registration deadline.

Selected Candidates

List of Short-listed candidates for 4 Weeks Summer Internship cum Training Program on VLSI and Embedded Systesm (VESD 2016) is displayed below. On-spot registration are open for the Program.

NAME INSTITUTE NAME
Priyanka Singh Amity University
Shruti Choudhary Army Institute Of Technology
Saurabh Sharma Government Engineering College, Ajmer
Mallika Dhamija Jaipur Engineering College And Research Centre
Sumit Kumar Jaypee Institute of Information Technology Noida 62
Raghav Dwivedi Jaypee Institute of Information Technology, Noida
Prafull Gujaria Motilal Nehru National Institute of Technology, Allahabad
Sumaiyyah Nizam PES University
Deshmukh Vedanti Shri Guru Gobind Singhji Institute of Information & Technology, Nanded
Aditya Vikram Mitra The LNMIIT, Jaipur
Anusha Agarwal The LNMIIT, Jaipur
Hema Aggarwal The LNMIIT, Jaipur
Hemant Kumar Sharma The LNMIIT, Jaipur
Monika Jain The LNMIIT, Jaipur
Mupparapu Nitinraj The LNMIIT, Jaipur
Nikhil Paliwal The LNMIIT, Jaipur
Phaniraj Seragunta The LNMIIT, Jaipur
Prachi The LNMIIT, Jaipur
Priyal Shah The LNMIIT, Jaipur
Priyanka Gupta The LNMIIT, Jaipur
Shivangi Sharma The LNMIIT, Jaipur
Sumit Sapra The LNMIIT, Jaipur
Monica Verma G.L Bajaj Institute of Technology and Management, Noida

Contact us Now

Dr. Kusum Lata: kusum@lnmiit.ac.in
Dr. Abhishek Sharma abhishek.sharma@lnmiit.ac.in
Mr. Sandeep Sainisandeep.saini@lnmiit.ac.in

The LNM Institute of Information Technology
Rupa-ki-Nangal, Post-Sumel,Via-Jamdoli
Jaipur-302031, Rajasthan INDIA
Phone: 0141-5191741 (Ext 223, 426 and 416)