About the Workshop


The LNMIIT Jaipur is conducting a 2 Days workshop on ASIC Design Flow using Mentor Graphics Tools, in association with CoreEL India Pvt. Ltd. This Program is being organized to train faculty members and students working in the domains of VLSI and Embedded System designs at RTL level using Mentor Graphics Tools. The workshop would be helpful in strengthening your knowledge and understanding in the field and will help in long term learning.

The Training program would cover the following modules:

  1. ASIC Design.

  2. Full Coustom Design Flow

  3. Solutions for IC/ASIC Design & Verification Semi - Custom Design Flow

  4. Hands on experience with RTL Code writing

  5. Hands on experience with layout design

The training program is aimed to become a major outlet and networking opportunity for students, researchers, practitioners and educators interested in VLSI and Embedded System Designs using Mentor Graphics Tools.

About the Institute


The LNM Institute of Information Technology ( The LNMIIT ) was founded in 2002 as a joint effort between Rajasthan State and Lakshmi and Usha Mittal Foundation's philanthropic initiative. With the emphasis on quality and rigor in education, the Institute was granted Deemed University status by UGC in 2006 under the De-Novo categor y.
The Institute offers four-year UG (B.Tech.), two-year M.Tech. and Ph.D. programs in the field of Communication and Computer Engineering (CCE), Computer Science and Engineering (CSE), Electronics and Communication Engineering (ECE), Mechanical-Mechatronics Engineering (MME) and Mechanical Engineering (ME). Facilities for PG research leading to Ph.D. are also available in the field of Physics, Mathematics and Humanities and Social Sciences (HSS).

Instructors

Advisor

Prof. S.S. Gokhale

Director, The LNMIIT, Jaipur

Advisor

Prof. Raghuvir Tomar

Dean, Research and Development, The LNMIIT, Jaipur

Advisor

Dr. Soumitra Debnath

HoD, ECE, The LNMIIT, Jaipur

Industry Instructor

Mr. Ankur Sangal

Sr. Application Engineer, CoreEL Technologies (I) Pvt. Ltd

Faculty Coordinator

Dr. Kusum Lata

Assistant Professor, The LNMIIT, Jaipur

Areas of Expertise: VLSI Design, Formal Verification of Hardware Designs, Digital System designs using FPGAs

Faculty Cooridinator

Dr. Abhishek Sharma

Assistant Professor, The LNMIIT, Jaipur

Areas of Expertise: Embedded Systems, High Performance Computing and Organic Semiconductors.

Faculty Cooridinator

Mr. Sandeep Saini

Assistant Professor, The LNMIIT, Jaipur

Areas of Expertise: Digital VLSI circuits, VHDL, Embedded Systems.

Technical Instructor

Mr. Vinod Kumar

Technical Superintendent, The LNMIIT, Jaipur

Areas of Expertise: VHDL, Embedded Systems.

Technical Instructor

Mr. Phoolchand Kumawat

Junior Technical Superintendent, The LNMIIT, Jaipur

Areas of Expertise: VHDL, Embedded Systems.

Program

The Workshop program will be as follows.

DateTime Session
30-08-201609:00-10:00Registration
30-08-201610:00-11:00 ASIC Design, Basic of ASIC design , full custom design flow,spice net list , spice models & analysis , layer map file , DRC & LVS rule layout design
30-08-201611:00-11:15 Tea Break
30-08-201611:15-02:00Full coustom design Flow (Demonstration ), ( schematic design , spice simulation using Eldo tool , layout design Layout design using SDL , caliber DRC , Caliber LVS , Caliber PEX , post layout simulation )
30-08-201602:00-02:45 Lunch Break
30-08-201602:45-04:00Full coustom design Flow( Hands on training ) (schematic design , spice simulation using Eldo tool , layout design , Layout design using SDL , caliber DRC , Caliber LVS , Caliber PEX , post layout simulation )
30-08-201604:00-04:15 Tea Break
30-08-201604:15-05:00Full coustom design Flow( Hands on training ), (schematic design , spice simulation using Eldo tool , layout design , Layout design using SDL , caliber DRC , Caliber LVS , Caliber PEX , post layout simulation
31-08-201610:00-11:15 Solutions for IC/ASIC Design & Verification Semi - Custom Design Flow demonstration ( RTL to GDSII Flow )
31-08-201611:15-11:30 Tea Break
31-08-201611:30-02:00Hands on experience with RTL Code writing , simulation with Questa Sim . synthesis
31-08-201602:00-02:45 Lunch Break
31-08-201602:45-04:00Hands on experience with layout design ( Floor Planning , Placement , routing , DRC ., LVS with XRC
31-08-201604:00-04:15 Tea Break
31-08-201604:00-04:15Hands on experience with layout design ( Floor Planning , Placement , routing , DRC ., LVS with XRC
31-08-201604:15-05:00Vote of thanks and Certificate Distribution

Important Dates

Registration Deadline : 24th August 2016
Participation Confirmation : 26th August 2016
Workshop Dates 30th and 31st August 2016

Registration Details

There are limited seats for 30 participants in the workshop which would be filled on first come first serve basis. Registration Fee is as follows:

External Faculty Members : Rs 1,000
External Students : Rs 500
LNMIIT Students and Faculty: Rs 300

Payment for Registration amount can be made in vash to Mr. Sandeep Saini before 24th August 2016.

Register online at http://bit.ly/mentor_workshop

Contact us Now

Dr. Kusum Lata: kusum@lnmiit.ac.in
Dr. Abhishek Sharma abhishek.sharma@lnmiit.ac.in
Mr. Sandeep Sainisandeep.saini@lnmiit.ac.in

The LNM Institute of Information Technology
Rupa-ki-Nangal, Post-Sumel,Via-Jamdoli
Jaipur-302031, Rajasthan INDIA
Phone: 0141-5191741 (Ext 223, 426 and 416)